?perform?logic?design,?rtl?coding,?design?verification,?logic?synthesis,?dft?and?static?timing?analysis
?develop?verification?environment?and?coverage?closure
?support?wafer?level?testing?and?silicon?evaluation
?prepare?technical?documents任職條件
?or?above?in?electronic?engineering?or?equivalent.?applicants?with?postgraduate?degree?would?be?considered?as?an?advantage
?5?years?or?above?of?solid?experience?in?one?or?more?of?the?following?areas:?verilog-based?logic?design?and?synthesis,?constrained?random?testbench?with?system?verilog?&?uvm,?assertion?based?design?verification?or?circuit-level?spice?simulations
?knowledge?of?soc?and?embedded?system.
?knowledge?of?ｓｃｒｉｐｔing?languages?such?as?perl,?tcl?and?make
?candidate?with?less?experience?will?be?considered?as?digital?design?engineer相關(guān)福利：
提供：養(yǎng)老保險????失業(yè)保險????醫(yī)療保險????生育保險????工傷保險????住房公積金????年終獎????員工旅游????
